m monad-knowledge FIIT STU · open research vault
hardwar

pi-m2-hat

Also known as: Pi M.2 HAT, Raspberry Pi M.2 HAT+, Pi 5 M.2 HAT, M.2 HAT

Description

A PCIe ×1 → M.2 2230 / 2242 / 2260 / 2280 key-M (or key-B with bridge) carrier that mounts on top of a Raspberry Pi 5 and exposes the Pi's PCIe gen 2 lane (gen 3 with overlay) to an M.2 device. The lab uses 14× units to host 14× Intel AX210 M.2 2230 NICs on 14× Pi 5s.

This entry exists because the M.2 HAT is a deployment-blocking dependency for the entire Pi 5 + AX210 + FeitCSI sensing line. Treating it as a generic accessory hides the bring-up surface area: ribbon orientation, gen 2 vs gen 3 stability, firmware-loader expectations, antenna routing.

Specs / capabilities

  • PCIe ×1 to M.2 2230 key-M (AX210 fits 2230)
  • Supports M.2 2230 / 2242 / 2260 / 2280 lengths
  • Bus-powered from the Pi 5's PCIe slot (no external power)
  • Includes the FFC ribbon cable that mates Pi 5 PCIe header ↔ HAT
  • Mounts via the Pi 5's standard 4-corner standoff pattern

Bring-up checklist (for EXP-P1)

  1. Mount HAT to the Pi 5 via the 4 corner standoffs before connecting the FFC ribbon. The ribbon socket on the Pi 5 is fragile and the HAT can mechanically lift it.
  2. Connect the FFC ribbon with the contacts on the same side at both ends (Pi 5 socket and HAT socket both accept the same orientation; check the silkscreen).
  3. Seat the AX210 in the M.2 slot, screw down with the supplied M2 screw.
  4. Route the two U.FL pigtails from the AX210 to the supplied stick antennas. Both must be connected — AX210 will refuse to associate at full rate with one antenna missing.
  5. Boot the Pi 5 with the SD card slot accessible (no SSD installed via the HAT — the HAT is single-slot).
  6. Verify lspci shows the AX210 as Intel Corporation Wi-Fi 6 AX210/AX211/AX411.
  7. Add dtparam=pciex1_gen=3 to /boot/firmware/config.txt only if the gen-2 link is fully stable and additional bandwidth is needed; revert to gen 2 if any link error appears in dmesg.

Quirks / known issues

  • The FFC ribbon is the single most common bring-up failure point. Replacement ribbons are inexpensive — keep spares.
  • Active cooling on the Pi 5 is required when running the AX210 at full rate sustained; otherwise throttling will degrade capture rate.
  • The HAT occupies the Pi 5's PCIe header, so no NVMe SSD can coexist. Boot remains on the SD card slot.

Role in the experiment series

  • EXP-P1: HAT mount + ribbon + antenna + lspci enumeration is the first per-node bring-up gate.
  • EXP-F1 / F2 / F3: deployed in production; expected to be untouched post bring-up.

Tooling

  • None beyond the Pi 5's standard toolchain — the HAT is passive PCIe.
  • raspberry-pi-5 — the host
  • intel-ax210 — the NIC