Notes
Two-board design: ESP32-C5-DevKitC-1 (main/CSI node) linked via SPI or high-speed UART to ESP32-S3-DevKitC-1 (SD card writer sidecar). S3 uses SDMMC 4-bit mode at 40 MHz to microSD (SDXC UHS-I A1/A2). Keep SD socket wires short for signal integrity. Source boards from Mouser Europe (mouser.sk). C5 handles Wi-Fi 6 CSI capture + BLE; S3 handles buffered high-throughput logging (10–20 MB/s target).
Architecture
ESP32-C5-DevKitC-1 (main node):
- Runs CSI sensing and Wi-Fi 6 logic
- Packs CSI snapshots into compact binary frames
- Streams frames over SPI (master) or high-speed UART to the S3 sidecar
- Implements back-pressure handling via GPIO signaling ESP32-S3-DevKitC-1 (logger sidecar):
- SDMMC 4-bit mode at 40 MHz High-Speed to microSD socket
- Mounts card via
esp_vfs_fat_sdmmc_mount(FAT32/exFAT) - Producer ISR receives packets from SPI/UART → ring buffer in RAM/PSRAM
- Consumer FreeRTOS task pulls 64 KB blocks and appends to log file
- Target throughput: 10–20 MB/s with good SDXC card
Inter-Board Link
SPI (recommended for higher throughput): C5 = master, S3 = slave. Signals: SCK, MOSI, MISO, CS, GND. Effective payload: several MB/s at 20–40 MHz on short wires. UART (simpler, lower throughput): 3 Mbaud with framed binary records + CRC. Suitable if sustained CSI rate ≤ few hundred kB/s.
Hardware
- 1× ESP32-S3-DevKitC-1-N32R16V (32 Mbit flash, 16 Mbit PSRAM) — Mouser Europe
- 1× ESP32-C5-DevKitC-1 — Mouser Europe
- 1× microSD socket/breakout exposing CLK, CMD, D0–D3 (not SPI-only modules)
- 1× 64 GB SDXC UHS-I card (A1/A2 rated)
- Short Dupont wires or perfboard for SD socket wiring
SD Card Wiring (S3)
- SD_CLK → GPIO14, SD_CMD → GPIO13, SD_D0 → GPIO12, SD_D1 → GPIO11, SD_D2 → GPIO10, SD_D3 → GPIO9
- VCC 3.3V + GND from DevKitC
- Keep wires short and parallel for signal integrity